Various methods for producing compound semiconductor single crystals are well known. For example, a seed crystal is immersed in a melted solution of the crystal and then the seed crystal is pulled up to grow the single crystal from the seed crystal. As an alternative method, the melted solution is gradually solidified to grow the single crystals. Particularly, GaAs single crystals are produced in an industrial scale by the Liquid Encapsulated Czochralski Method (LEC Method) which belongs to the former method, and by the Gradient Freeze Method (GF Method), Horizontal Bridgeman Method (HB Method), and the Vertical Bridgeman Method (VB Method), which belongs to the later method.
Although these single crystal growth methods each are a little different from each other, crystals are grown in a basically similar process such that the temperature gradient between the crystal and the melted solution is generated to gradually solidify the melted solution. In the process, the interface between the liquid and the solid where the crystal is grown is kept at the melting point, but the part of the crystal already grown is kept at the lower temperature than the melting point. Accordingly, these single crystal producing methods can not avoid the production of inhomogeneous single crystals.
Conventionally, the compound semiconductor single crystals produced by these producing methods have been used as various optoelectric devices such as light emitting diodes, laser diodes, and photo-detectors; and various substrates for high speed devices such as FET (Field Effect Transistor). Further the compound semiconductor single crystals have been expected to be used as substrates for OEIC (Optoelectronic Integrated Circuit) on the same substrate of which optoelectric devices and FETs are fabricated.
As disclosed above, however, these single crystal producing methods can not essentially avoid the production of the single crystals with inhomogeneous properties. Thus the devices employing the single crystals produced by these methods would remarkebly scatter in their properties depending on the single crystal wafer used in the devices. Particularly in the production for discrete high frequency FETs and digital ICs, this scattering in the crystal property would cause a decrease the yield rate of the products. This fact has been realized as one of the reasons why the compound semiconductor device has not been broadly used.
This scattering would be caused by various factors, for example dislocations generated in the crystal. In order to eleminate the dislocations some impurities such as In have been doped in the crystal.
In addition to the above method, Rumsby provided the method for annealing the single crystal ingot at a high temperature to decrease the scattering in the crystal property. Thereafter various inventions relative to this ingot-annealing method have been provided; for example, Japanese Patent Application Laid-Open Publication No. 62-21699 and No. 62-21800.
Conventionally, the ingot-annealing has been carried out at temperatures 138.degree. C. lower than the melting point. If the crystal ingot is subjected to the annealing at high temperatures than the above level, many defects would be generated in the annealed ingot. In detail, even if the whole of the ingot is heated at an uniform temperature during the annealing process, the ingot can not be uniformly cooled and thus thermal stress would be generated in the crystal by the cooling process after the annealing process. This thermal stress would cause an increase in the dislocation density which is generally called as EPD (Etch Pit Density) in the ingot, or slip lines due to the dislocation introduced from the periphery of the ingot. While the increase of EPD and the generation of the slip lines can be prevented by delaying the cooling speed, the period of the ingot staying under the low temperature condition would be prolonged so that new defects would be generated. Thus newly generated defects would spoil the homogeneity of crystal properties. On the other hand, when the ingot is subjected to the annealing at high temperatures, the high vapor pressure element of the crystal such as As would possibly volatilize from the crystal. According to the above reasons, conventional ingot annealing has been carried out at temperatures 138.degree. C. lower than the melting point.
Other heat treatment methods for GaAs single crystals have been conventionally proposed. For example, J. Lagowski at al. have reported that a GaAs single crystal wafer can be subjected to heat treatment at temperature range from 1100.degree. to 1200.degree. C. for 8 to 16 hours and then rapidly cooled to a room temperature within 2 or 3 seconds to decrease the EL2 concentration of GaAs, referring to "Inverted Thermal Conversion-GaAs, a New Alternative Material for Integrated Circuits" Appl. Phys., Lett, 49, (1986)892. However, this method requires ultra-high speed cooling at a cooling rate of 10000.degree. C./min would produce GaAs with a dislocation density of 10.sup.7 cm.sup.-2 which can not be practically applied for device fabrication.
Further, A. K. Chin et al. have reported that GaAs single crystal ingot is subjected to heat treatment at 1200.degree. C. for 6 hours and then gradually cooled at a cooling rate of 50.degree. C./h (=0.8.degree. C./min), referring to "Effects of thermal annealing on semi-insulating undoped GaAs grown by the liquid-encapsulated Czochralski technique" J. Appl. Phys. 57(6), 15 Mar. 1985. However, this method can not satisfy the object of the present invention, described later; i.e., to decrease the number of egg-shape etch pits revealed by AB etchant.
While a conventional In-doping method can eliminate the generation of dislocation in the single crystal, it can not sufficiently decrease the scattering of the device properties. Further, the above described conventional ingot-annealing method provides some effect to decrease the scattering in the crystal properties, but it is not sufficient.
The object of the present invention is to provide compound semiconductor single crystals or the wafers which can improve the homogeneity of the device properties when they are used as the substrates and the method for producing these materials.